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Cadence University Program

Federal University of Campina Grande
 
Cadence University Program Member

General Information

The Federal University of Campina Grande is a member of the Cadence University Program and this web page will outline how Cadence products are used on our campus. This web page only describes the courses and research projects that use Cadence products, other software may also be used but that is irrelevant to the topic of this page. Remember: Cadence is the name of a company - students do not "learn Cadence", they learn about Cadence products.

  1. Circuit Integrated for Processing of Meteorological Signals

    Type: research
    Project of an integrated circuit of a converting sigma-delta with thermoresistive sensor in the mesh of feedback of the converter, with the goal to measure fluid speeds.

  2. Structure and Conception of Integrated Circuit

    Type: classroom
    Introduction to Microelectronics. Elements of physics of semiconductors, technology and modeling of transistors. Mathematical tools. Basic components. Amplification. Techniques of commuted capacitors. Technique in current way. Introduction to filtering. Introduction to analogical-digital and digital-analogical conversion. Noise in integrated circuits. Simulation. Test of CIs.

  3. IC of a Analogico-digital Conversor Sigma-delta with Termoresistive Sensor

    Type: research
    Project of an integrated circuit of a converting sigma-delta with termoresistivo sensor in the mesh of feedback of the converter, with the goal to measure temperature and humidity.

  4. ASIC Design Process.

    Type: classroom
    The course introduces basic techniques of optimization of VLSI circuits. Algorithms for circuit partitioning, floorplanning, placement and global routing. Scaling and deep-submicron issues in VLSI design are emphasized.

  5. Functional Verification in ASIC Design.

    Type: classroom
    This course introduces basic techniques of functional verification of ASIC Design.

  6. Speaker Verification IP-Core. 

    Type: research
    The Speaker Verification IP-Core is responsible for verifying whether a speaker is who he or she claims to be or not. The verification is done by comparing a set of coefficients, extracted in real time from his/her voice, with a set of coefficients (a codebook) previously obtained during a speaker system-training phase. So, there are three possible responses: Accepted, Rejected or Unknown.

Disclaimers

Information is provided 'as is' without warranty of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, orgin, authorship, or otherwise. Please use this information at your own risk. We recommend using it on a copy of your data to be sure you understand what it does under your conditions. Keep your master intact until you are satisfied with the use of this information within your environment.

Contact for this Web Page

Email: freire@dee.ufcg.edu.br - Raimundo Freire


Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.